Checks graphical line arrangements to heed signal flow reuirements from rule db_0141.
Only paragraph (a) of db_0141 is implemented, as the other paragraphs lack definitions of block parallelity (b) and line bend unnecissity (c).
Depending on the Matlab release, clicking on a line link in the check results will always highlite the whole line tree of an output port due to the implementation of hilite_system from the Simulink API.
Exempted from the checks are all contents linked into the model from libraries listed in the jExclLibs parameter.